1. Field of the Invention
The invention relates to a voltage regulator, and more particularly to a voltage regulator for a terminator, which enables source and sink current by utilizing one type of output power transistor.
2. Description of the Prior Art
Computer systems typically use an electronic bus to communicate signals between various computing devices such as processors, memories, and input/output (I/O) devices. A computer bus commonly communicates addresses, data, and control signals between the computing devices connected thereto. The signals are typically driven on the bus by drivers incorporated into each of the connected computing devices.
A common computer peripheral interface, for example, is the Small Computer Systems Interface (SCSI) which can reduces the I/O bottleneck in existed computer systems. However, as the data rates over the SCSI bus increase, the effects of transmission line associated with the SCSI bus degrade the integrity of the data transmitted over the bus. Thus, termination for the bus has become a critical design factor due to the increases in data rates, the potential distances between SCSI stubs, differences in cable design and other factors. For example, due to impedance mismatches on the SCSI bus, the acknowledge and request control signals may be reflected such that the acknowledge and request lines be double clocked. One reason of signal reflection is due to mismatches between cables having slightly different impedances.
Impedance mismatches can be resolved by using a terminator for a bus. The terminator provides the signals of a bus with both a termination resistor (Rt) for matching characteristic impedance of the transmission line and a termination voltage (Vo) for assisting driving circuit to reduce the driven loading of a bus, shown in FIG. 1.
Generally, the types of terminator include passive and active. Shown in FIG. 2 is a typically passive terminator 100, which provides an equivalent termination resistance being R1*R2/(R1+R2) and an equivalent termination voltage being Vp*R2/(R1+R2). One of disadvantages of the passive terminator 100 is the problem of power dissipation. The passive terminator 100 provides a constant current path between the terminator power line 106 and ground even when the signal line of bus 102 is not active (i.e., at high impedance), resulting in continuous power dissipation.
An active terminator, such as the Boulay terminator 200 shown in FIG. 3, provides the potential reduction of reflection problems caused by impedance mismatches on the bus. In general, active terminators in the prior art attempt to reduce the reflection by compensating for voltage drops and maintaining a constant stable voltage to the terminating equipment resistors. In Boulay terminator 200, Rt provides a termination resistance and voltage regulator 210 provides a terminator voltage Vo. For application[s] on high-speed buses, such as SSTL_2 bus (Stub Series Terminated Logic for 2.5 volts) of symmetric drive that is used in DDR DRAM, it is necessary for voltage regulator 210 to enable to source and sink currents from a terminator voltage. In general, synchronous rectified switch mode regulator enables to source and sink currents. However, it needs a complicated circuit, high cost, and has a disadvantage of switching noise.
Shown in FIG. 4 is a bus with a bi-directional-current conventional linear voltage regulator disclosed in U.S. Pat. No. 5,945,814 of Covaro. To be specified, the block diagram of FIG. 4 is amended according to the types of devices disclosed in FIG. 5 of Covaro. The bipolar transistors named xe2x80x9cMMBT3904LT1xe2x80x9d and xe2x80x9cMJD31Cxe2x80x9d are NPN transistors and xe2x80x9cMJD32Cxe2x80x9d is a PNP one, which all are manufactured by ON Semiconductor(trademark) company. That is, there are two types of output power transistors (NPN and PNP) are used in Covaro""s invention.
Shown in FIG. 5 is another bi-directional-current linear voltage regulator disclosed in U.S. Pat. No. 5,608,312 of Wallace. Output power CMOS devices (NMOS and PMOS) are necessary for Wallace""s invention. However, for consideration of easy manufacture, stockpile and cost, single-type output power MOS, especially NMOS, is desired to be utilized in the linear voltage regulator.
Depicted in FIG. 6 is an output voltage regulator of totem-pole type with NMOS device as an output power device. Such a voltage regulator enables to source and sink currents with the suitable settings of a bias. However, it is disadvantageous to provide the narrow ranges of bias settings according to the adjustment of threshold voltage of a specific output power NMOS device. Thus, the narrow ranges of bias settings make differences in the selection of output power NMOS device. Furthermore, the problem of shoot-through current may happen in such a circuit desire on a condition of the output power NMOS device with variable characteristics.
Accordingly, a linear voltage regulator applied to active terminator is necessary to enable sourcing and sinking currents, and further applying only single-type output power transistors with permission of large variation on the characteristics.
It is one object of the present invention to provide a voltage regulator for terminating a bus. The regulator enables to source and sink a current, to and from, the bus.
It is another object of the present invention to provide a source and sink voltage regulator for terminating a bus. The voltage regulator utilizes single-type output power transistors, such as NMOS for all of output power transistors, as output power devices.
It is another object of the present invention to provide a linear voltage regulator applied on the active terminator of a bus. The linear voltage regulator can prevent shoot-through current and permit applying the output power transistors that have diverse perturbation of the threshold voltage.
In the present invention, a voltage regulator for terminating a bus comprises a voltage-regulated terminal for providing a regulated output voltage to terminal resistors of the bus. A NMOS transistor of common-drain configuration is for sourcing a first current, via the voltage-regulated terminal, to the terminal resistors of the bus. A source of the NMOS transistor of common-drain configuration is coupled to the voltage-regulated terminal and a gate of the NMOS transistor of common-drain configuration is for receiving a control input of a first operational amplifier. The NMOS transistor of common-drain configuration provides a non-inverting amplification. A NMOS transistor of common-source configuration is for sinking a second current, via the voltage-regulated terminal, from the bus. A transistor of common-source configuration is coupled to the voltage-regulated terminal and a gate of the NMOS transistor of common-source configuration is for receiving a control output of a second operational amplifier. The NMOS transistor of common-source configuration provides an inverting amplification. The first operational amplifier is operated as a non-inverting amplifier and formed a first non-inverting combination circuit with the NMOS transistor of common-drain configuration. With the comparison of an input reference voltage and a negative feedback voltage of the voltage-regulated terminal through a divider circuit of a feedback network, the first operational amplifier outputs the control output of the first operational amplifier into the NMOS transistor of common-drain configuration. The second operational amplifier is operated as an inverting amplifier and formed a second non-inverting combination circuit with the NMOS transistor of common-source configuration. With the comparison of the input reference voltage and the negative feedback voltage of the voltage-regulated terminal through a divider circuit of the feedback network, the second operational amplifier outputs the control output of the second operational amplifier into the NMOS transistor of common-source configuration.